OpenHW Group Projects

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CORE-V-cores

System Verilog RTL source code for the CORE-V family of RISC-V cores.

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CORE-V-docs

Design, Verification and Platform documentation for the CORE-V family of RISC-V cores.

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core-v-verif

Functional verification project for the CORE-V family of RISC-V cores.

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