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Statement of Work for OpenHW Europe WG HW Verification Engineer

The Eclipse Foundation Europe GmbH is hiring for its OpenHW Europe Working Group a HW Verification Engineer. Working as a member of the Eclipse Research Team, and working closely with the OpenHW Technical Working Group, the candidate will work to verify at industrial-grade open-source IPs based on RISC-V.

Through the OpenHW Europe Working Group, we are recruiting for the role of HW Verification Engineer that will primarily contribute to the TRISTAN project for the next 3 years. The TRISTAN (Together for RISc-V Technology and ApplicatioNs) project is a KDT-JU European Union-funded project that aims to expand, mature, and industrialize the European RISC-V ecosystem for the next generation of industrial hardware so that it is able to compete with existing commercial/proprietary alternatives. The project will address SW to EDA tools, all the way to RTL components, ensuring a complete stack based on RISC-V.TRISTAN includes several work packages that will cover 1) requirements collections of the European market needs; 2) development of industrial-grade CPU and SoC building blocks; 3) software stacks; 4) and applications/demo development.

A major focus for TRISTAN is to provide European digital sovereignty and democratic access to most of the RISC-V IPs As such, a significant portion of the developed IP blocks under TRISTAN will be released as open-source IPs.

The OpenHW Group ecosystem, and in particular, the OpenHW Europe Eclipse Foundation Working Group, provides industrial-grade open-source IPs verified to be compliant with a Technology Readiness Level greater than or equal to TRL5.

We are looking for a Hardware Verification Engineer that extends the OpenHW Group ecosystem.

In this role you will:

  • Carrying out typical research tasks including dissemination, reporting, etc.
  • Support the specific initiatives of the OpenHW Technical Working Group to drive interest, participation, and adoption beyond just the TRISTAN project
  • Support the broader objectives of the EF’s European research team, including
    • Lead the activities of the Eclipse Foundation to support the European research ecosystem, more specifically in the OpenHW Europe working group activities.
    • Initiate and organize dissemination and community-building activities for the projects, leveraging existing Eclipse Foundation initiatives and assets
    • Facilitate project participation at events such as conferences to benefit the projects
    • Enable dissemination through web assets, newsletters and Eclipse-related social media
    • Complete regular reporting (workload and expenses) as required by the EU processes
    • Support research project developers in working with the Eclipse Development Process (EDP) and open source and open hardware best practices
    • Represent the Eclipse Foundation and OpenHW Europe working group at research project meetings and reviews
    • Encourage synergies among the EU projects and Eclipse Foundation members
  • Use SystemVerilog and UVM to create and extend our testbenches: you should know how to verify IPs with random instructions
  • Use GitHub to integrate and maintain everything open-source on GitHub under core-v-verif
  • Verify CPUs based on RISC-V
  • Verify peripherals such as UART, SPI, GPIOs, interrupt controllers, and interconnects
  • Integrate and extend existing CPUs to support extra features
  • Integrate and extend new co-processors
  • Work fully remotely in a large and global team

To accomplish the mission above, you should:

  • Be very confident with SystemVerilog and UVM for use with coverage-driven, constrained-random verification strategies.
  • A working knowledge of:
    • Linux, Make, and Python
    • Computer architectures of general-purpose CPUs
    • Peripheral busses, interrupt controllers, and peripherals such as UART, SPI, and GPIOs
    • A commercial SystemVerilog simulator and associated debug and coverage tools
  • Familiarity with Formal Verification, RTL design, RISC-V ISA, and Git would also be an asset


  • A Bachelor’s degree (or higher) in EE or CS with 5+ years of experience
  • Fluent in English (spoken and written)
  • You must be a resident of Italy, France, Spain, or Germany

Contact David Schiavone at [email protected] if you have any questions or if you want to apply.

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